Responsibilities:

• Develop, maintain, and qualify CAD flows for 3DIC and 2.5D designs, including chiplets, interposers, and advanced packaging technologies
• Enable end-to-end implementation and signoff methodologies covering floor planning through tapeout
• Support die-to-die connectivity, bump/TSV-aware flows, and cross-die constraint management
• Work with design and packaging teams to integrate package-aware and system-aware considerations into PD flows

Timing, Power, and Reliability Methodology

• Develop and support STA methodologies for multi-die designs, including cross-die timing, constraints, and closure strategies
• Enable power analysis, IR drop, and EM signoff flows for 2.5D and 3DIC systems
• Define guidelines for ESD verification in advanced packaging contexts
• Assist with tool qualification, correlation, and signoff criteria definition

Thermal, CFD, and Multiphysics Methodology

• Develop and support thermal analysis methodologies for 3DIC and 2.5D designs
• Enable CFD/FEM-based thermal analysis to model conduction, convection, and airflow effects from die to package to system
• Support coupled electro-thermal and Multiphysics flows, integrating power, thermal, and reliability analysis
• Partner with design and package teams to incorporate thermal considerations early in the design flow

Automation, Infrastructure, and Enablement

• Build and maintain automation, scripts, and checks to improve flow robustness, runtime, and usability
• Develop documentation, examples, and training materials for design teams
• Debug flow issues and provide CAD support during active design cycles
• Drive continuous improvement based on user feedback and silicon takeaways

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